cantilangnon

UNIVERSITY OF ILLINOIS AT URBANA-CHAMPAIGN | COLLEGE OF ENGINEERING Distinguished Alumni Award   Leopoldo D. Yau (S’67-M’68). was born in. Cantilan,. Surigao del Sur, Philippines,. on Au-. gust 15, 1940. Inventor Leopoldo D. Yau Address: Portland, OR No. of patents: 19 Last patent issue date: 2004-12-21 Patent No. Patent Title: Issue Date: RE38674 Process for forming a thin oxide layer A novel process for forming a robust, sub-100 Å oxide is disclosed. Native oxide growth is tightly controlled by flowing pure nitrogen during wafer push and nitrogen with a small amount of oxygen during temperature ramp and stabilization. First, a dry oxidation is performed in… 2004-12-21 6326664 Transistor with ultra shallow tip and method of fabrication A novel transistor with a low resistance ultra shallow tip region and its method of fabrication. The novel transistor of the present invention has a source/drain extension or tip comprising an ultra shallow region which extends beneath the gate electrode and a raised region. 2001-12-04 6165826 Transistor with low resistance tip and method of fabrication in a CMOS process A novel transistor with a low resistance ultra shallow tip region and its method of fabrication in a complementary metal oxide semiconductor (CMOS) process. According to the preferred method of the present invention, a first gate dielectric and a first gate electrode are formed on a first portion… 2000-12-26 6139404 Apparatus and a method for conditioning a semiconductor wafer polishing pad A semiconductor wafer polishing pad conditioner which includes a support structure and a roller which is rotatably mounted to the support structure. The roller has a working surface which is formed with a plurality of blades. 2000-10-31 6095904 Orbital motion chemical-mechanical polishing method and apparatus A method and apparatus for polishing a thin film formed on a semiconductor substrate. A table covered with a polishing pad is orbited about an axis. Slurry is fed through a plurality of spaced-apart holes formed through the polishing pad to uniformly distribute slurry across the pad surface… 2000-08-01 5856697 Integrated dual layer emitter mask and emitter trench for BiCMOS processes A new method of isolating a polysilicon emitter from the base region of a bipolar transistor, trenching the polysilicon emitter into the semiconductor substrate, and maintaining a consistent base width of a bipolar transistor independent of variations in emitter mask thicknesses is disclosed. The… 1999-01-05 5783478 Method of frabricating a MOS transistor having a composite gate electrode A novel, reliable, high performance MOS transistor with a composite gate electrode which is compatible with standard CMOS fabrication processes. The composite gate electrode comprises a polysilicon layer formed on a highly conductive layer. The composite gate electrode is formed on a gate… 1998-07-21 5710450 Transistor with ultra shallow tip and method of fabrication A novel transistor with a low resistance ultra shallow tip region and its method of fabrication. The novel transistor of the present invention has a source/drain extension or tip region comprising an ultra shallow region which extends beneath the gate electrode and a raised region. 1998-01-20 5625217 MOS transistor having a composite gate electrode and method of fabrication A novel, reliable, high performance MOS transistor with a composite gate electrode which is compatible with standard CMOS fabrication processes. The composite gate electrode comprises a polysilicon layer formed on a highly conductive layer. The composite gate electrode is formed on a gate… 1997-04-29 5595526 Method and apparatus for endpoint detection in a chemical/mechanical process… A method for polishing the surface of a substrate that overcomes the problems inherent in the prior art. During the polishing of a substrate, a quantity is calculated which is approximately proportional to a share of the total energy the polisher is consuming. Once this calculated quantity… 1997-01-21 5554064 Orbital motion chemical-mechanical polishing apparatus and method of fabrication A method and apparatus for polishing a thin film formed on a semiconductor substrate. A table covered with a polishing pad is orbited about an axis. Slurry is fed through a plurality of spaced-apart holes formed through the polishing pad to uniformly distribute slurry across the pad surface… 1996-09-10 5488003 Method of making emitter trench BiCMOS using integrated dual layer emitter mask A new method of isolating a polysilicon emitter from the base region of a bipolar transistor, trenching the polysilicon emitter into the semiconductor substrate, and maintaining a consistent base width of a bipolar transistor independent of variations in emitter mask thicknesses is disclosed. The… 1996-01-30 5434093 Inverted spacer transistor A method for forming narrow length transistors by forming a trench in a first layer over a semiconductor substrate. Spacers are then formed within the trench and a gate dielectric is formed between the spacers at the bottom of the trench on the semiconductor substrate. The trench is then filled… 1995-07-18 4690728 Pattern delineation of vertical load resistor A process for delineating a vertical resistor on a semiconductor device is disclosed. Resistive and diffusion barrier layers are deposited and then etched, first by dry plasma and then by wet bath. The two step etching allows complete removal of the deposited layers with minimal damage to exposed… 1987-09-01

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